There are many kinds of memory devices using semiconductors. For example, a dynamic random access memory (DRAM), a static random access memory (SRAM), an electrically erasable and programmable read only memory (EEPROM), and a flash memory are given.
In a DRAM, data is stored by holding charge in a capacitor which is provided in a memory cell. However, even when a transistor used for switching is in an off state, a slight amount of leakage current is generated between a source and a drain; thus, the data is lost within a relatively short time (several tens of seconds at the longest). Therefore, the data needs to be rewritten (refreshed) in a certain cycle (generally several tens of milliseconds).
In an SRAM, data is held by utilizing a bistable state of a flip-flop circuit. A CMOS inverter is generally used in a flip-flop circuit of an SRAM. Since six transistors are used in one memory cell, an integration degree of an SRAM is lower than that of a DRAM. In addition, the data is lost when power is not supplied.
On the other hand, in an EEPROM or a flash memory, a so-called floating gate is provided between a channel and a gate and charge is stored in the floating gate, whereby data is held. The charge stored in the floating gate is held even after power supply to a transistor stops, which is why these memories are called nonvolatile memories. For example, Patent Document 1 may be referred to for a flash memory.
In this specification, a memory having a floating gate, examples of which are an EEPROM and a flash memory, is called a floating gate nonvolatile memory (FGNVM). Since data at some stages can be stored in one memory cell in an FGNVM, storage capacity can be large. Further, since the number of contact holes can be significantly decreased in a NAND-type flash memory, an integration degree can be increased to some extent.
However, in a conventional FGNVM, high voltage is needed at the time of injection of charge to a floating gate or removal of the charge. Because of this, deterioration of a gate insulating film cannot be avoided and writing and erasing cannot be repeated without limitation.
[Reference]
[Patent Document]
    [Patent Document 1] Japanese Published Patent Application No. S57-105889